![]() ![]() The CD4020 is similar, without the oscillator. They chose the outputs they thought were most important or useful, I guess. At the time the 4060 was designed, few ICs had more than 16 pins. ![]() Yes, it doesn't have all the outputs brought out because there aren't enough pins! The designers decided that it was important to have 14 division stages, and they only had 10 pins available for outputs on the 16-pin package (after allocating VDD, VSS, reset, and three pins for the oscillator). If it's not in the 4060 data sheet, try data sheets from other manufacturers, or try the data sheets for other CMOS gates such as the 4069 or the 4049. There is a standard formula for calculating frequency from R and C for a two-gate CMOS oscillator. (I've used it a lot in experiments, and not had problems, but YMMV and I wouldn't use it in a design for manufacture.) There are only two inverters, so you have to use the two-gate version of the oscillator that (apparently) has some issues. You can use the inverters with a resistor and a capacitor as an oscillator. (I think you need one or two extra divide-by-two stages to get the frequency down to 1 Hz.) You can use the gates with a crystal, such as a 32768 Hz "watch crystal", so you can obtain a 1 Hz clock. This can mean that you don't have access to a frequency you want, although it's being generated inside the device. The 4060 has lots of stages, but not all the outputs are brought out. You don't get a square wave out of it though if you want 50% duty cycle, you can divide by half the number you want, then feed the output through a toggle flip-flop. When the count reaches the desired value and all outputs are high simultaneously, the counter resets to all zeros and starts counting again. You can make it divide by a specific number, rather than just powers of two, by ANDing several outputs together and feeding the AND gate output into the reset pin. It's just a ripple carry counter with some gates for making an oscillator with. ![]()
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